Very-Large-Scale Integration (VLSI) by Zhongfeng Wang

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This e-book is meant to cowl an extensive variety of VLSI layout subjects. The ebook may be more or less partitioned into four parts. part I is mainly centered on the algorithmic level and architectural level VLSI layout and optimization for photograph and video signal processing systems. component II addresses VLSI design optimizations for cryptography and mistakes correction coding. part III discusses well-known SoC design strategies as well as different application-particular VLSI layout optimizations. The last element will cowl typical nano-scale circuit-degree layout strategies.

The process of incorporating Circuits (IC) started its generation of VLSI (Very huge Scale Integration) in the 1970s whilst hundreds of transistors had been integrated into one unmarried chip. these days we're capable of combining more than a billion transistors on a single chip. however, the term "VLSI" remains getting used, although there has been some effort to coin a new term u.s.a. (ultra-huge Scale Integration) for quality differences many years in the past.

VLSI era has added awesome benefits to our regular life on account that its occurrence. VLSI circuits are used anywhere, actual programs include microprocessors in a non-public laptop or workstation, chips in a photograph card, digital digital camera or camcorder, chips in a mobile phone or a transportable computing device, and embedded processors in an automobile, et al. VLSI covers many stages of layout and fabrication of incorporated circuits.

For a business chip design, it entails device definition, VLSI architecture design and optimization, RTL (register transfer language) coding, (pre-and publish-synthesis) simulation and verification, synthesis, vicinity and course, timing analyses and timing closure, and multi-step semiconductor device fabrication together with wafer processing, die education, IC packaging, and testing, et al. because the method technology scales down, masses or even heaps of thousands and thousands of transistors are included into one unmarried chip.

hence, increasingly more complex systems can be incorporated into an unmarried chip, the so-known as system-on-chip (SoC), which brings to VLSI engineers ever more and more demanding situations to grasp strategies in diverse stages of VLSI layout. For contemporary SoC layouts, realistic applications are generally sped hungry. for example, Ethernet fashionable has evolved from 10Mbps to 10Gbps. Now the specification for 100Mbps Ethernet is on the manner. on the other hand, with the recognition of wi-fi and transportable computing devices, low strength consumption has grown to be extraordinarily essential. to fulfill those contradicting requirements, VLSI designers must perform optimizations in any respect stages of layout.

Ebook Details

Published Date / Year
(February 2010); eBook (Creative Commons Licensed)
Attribution 3.0 Unported (CC BY 3.0)
456 pages
eBook Format
PDF Files, and an PDF (469 pages)

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